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TDA7467
AUDIO MATRIX WITH SRS EFFECTS
The Device incorporates the SRS (Sound Retrieval System) under licence from SRS Labs, Inc.
1 STEREO INPUT INPUT ATTENUATION CONTROL IN 0.5dB STEP - MUTE FUNCTION MONO MODE (SRS 3D MONO) STEREO MODE (SRS 3D STEREO) SPACE AND CENTER ATTENUATORS ARE AVAILABLE ALL FUNCTION ARE PROGRAMMABLE VIA SERIAL BUS (I2C BUS) DESCRIPTION The TDA7467 is a SRS (Sound Retrieval System) audio matrix. It reproduces SRS sound processing stereo and mono sources both. The SRS sound is guaranteed by external components and it is not affected by internal process spreads. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers according to the SRS labs specificaPIN CONNECTION (Top view)
LOUT RIN LIN DIG_GND SCL ADDR SDA AGND PS1 PS2 PS3 PS4 PS5 PS6 1 2 3 4 5 6 7 8 9 10 11 12 13 14
D96AU507
DIP28 ORDERING NUMBER: TDA7467
SO28 ORDERING NUMBER: TDA7467D
tion. Control of all the functions is accomplished by serial bus. Thanks to the used BIPOLAR/CMOS/DMOS technology, Low Distortion, Low Noise and DC stepping are obtained.
28 27 26 25 24 23 22 21 20 19 18 17 16 15
ROUT CREF LP2 LP1 HP6 HP5 HP4 VS HP3 HP2 HP1 VREFOUT NETW2 NETW1
May 1997
1/11
HP1
HP2
HP3
HP4
HP5
PS4 PS5 PS1 LP1 25 26 LP2 9 19 22 23 24 10 11 18 20 13 14 PS6 12
BLOCK DIAGRAM
PS2
PS3
HPF1 HPF2 LPF1
0.15F FIX
31.5dB control
3
L-IN + + SRS PHASE SHIFTER 1 PHASE SHIFTER 2 5 7 I2C BUS DECODER + LATCHES MONO 6 4 MIX + MIX + 1
50K
HP6
AGND
CREF
VREFOUT
2/11
1F 15nF 1F 0.1F 2.2nF 27nF 4.7nF 0.47nF 0.1F 1F 0.1F L-OUT MONO SCL SDA ADDR DIG_GND + SRS MONO + 2 SRS FIX VREF SPACE 17 NETW1 1K 0.47F 130K NETW2
D96AU506
TDA7467
100nF
+
-
0.15F
CENTER
R-OUT
2
R-IN
50K
31.5dB control
SUPPLY
21 15 16
8
27
VS 22F
4.42K
1.5K
32.4K
47.5K
4.7nF
0.47F
3.74K
TDA7467
THERMAL DATA
Symbol R th j-pins Thermal Resistance Junction-pins Description Ma x. Value 85 Unit C/W
ABSOLUTE MAXIMUM RATINGS
Symbol VS T amb Tstg Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Parameter Value 11 -10 to 85 -55 to +150 Unit V C C
QUICK REFERENCE DATA
Symbol VS VCL THD S/N SC Supply Voltage Max. input signal handling Total Harmonic Distortion V = 1Vrms f = 1KHz Signal to Noise Ratio V out = 1Vrms (mode = OFF) Channel Separation f = 1KHz Input Control (0.5dB) SRS Center Control (1dB step) SRS Space Control (1dB step) Mute Attenuation -31.5 -31 -31 100 Parameter Min. 7 2 0.01 106 90 0 0 0 0.1 Typ. 9 Max. 10.2 Unit V Vrms % dB dB dB dB dB dB
ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25C, VS = 9V, RL = 10K, Vin = 1Vrms; RG = 600, all controls flat (G = 0dB), Effect Ctrl = -6dB, MODE = OFF; f = 1KHz unless otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
SUPPLY
VS IS SVR Supply Voltage Supply Current Ripple Rejection LCH / RCH out, Mode = OFF 60 7 9 25 80 10.2 V mA dB
INPUT STAGE
R IN V CL AVMIN AVMAX ASTEP VDC Input Resistance Clipping Level Min. Attenuation Max. Attenuation Step Resolution DC Steps Adjacent att. step THD = 0.3% 37.5 2 -1 31 -1 -3 50 2.5 0 31.5 0.5 0 1 32 1 3 62.5 K Vrms dB dB dB mV
SRS EFFECT CONTROL
C range1 Sstep1 Center/Space Control Range Center/Space Step Resolution -31 1 0 dB dB
3/11
TDA7467
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Test Condition Min. Typ. Max. Unit
AUDIO OUTPUTS
No(Off) No(srs) d SC Vocl R out Vout Output Noise (OFF) Output noise (srs) Surround Sound Distortion Channel Separation Clipping Level Output Resistance DC Voltage Level d = 0.3% 2 Output muted, Flat BW (20Hz to 20KHz) BW (20Hz to 20KHz) AV = 0; Vin = 1Vrms 4 5 50 0.01 90 2.5 30 3.8 0.1 Vrms Vrms Vrms % dB Vrms V
BUS INPUTS
Vil Vih Iin Vo Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge IO =1.6mA 3 -5 5 0.4 1 V V A V
SRS SURROUND SOUND MATRIX
CENTER StepC SPACE StepS PERSP1 SRS Control Range Center Step Resolution SRS Space Control Range Space Step Resolution Perspective 1 Input Signal of 125Hz SPACE = 0dB, CENTER = MUTE Rin = GND; Lin ROUT Input Signal of 2.15KHz SPACE = 0dB, CENTER = MUTE Rin = GND; Lin ROUT SPACE = MUTE, CENTER =0dB Rin = GND; Lin ROUT SPACE = MUTE, CENTER =0dB Rin = GND; Lin LOUT Lin = GND; Rin ROUT -31 1 -31 1 12 0 0 dB dB dB dB dB
PERSP2
Perspective 2
0
dB
L+R L, R
L+ R SRS Curve L, R SRS Curve
-8.5 -13.4
dB dB
4/11
TDA7467
I2C BUS INTERFACE Data transmission from microprocessor to the TDA7467 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). Data Validity As shown in fig. 3, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. Start and Stop Conditions As shown in fig.4 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. Byte Format Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an ac2 Figure 3: Data Validity on the I CBUS
knowledge bit. The MSB is transferred first. Acknowledge The master (P) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 5). The peripheral (audioprocessor) that acknowledges has to pull-down (LOW) the SDA line during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. Transmission without Acknowledge Avoiding to detect the acknowledge of the audioprocessor, the P can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking.
Figure 4: Timing Diagram of I2CBUS
Figure 5: Acknowledge on the I2CBUS
5/11
TDA7467
SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (S) A chip address byte A subaddress bytes A sequence of data (N byte + achnowledge) A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB S 1 0 0 0 0 0 A
LSB
MSB DATA
LSB ACK
MSB DATA
LSB ACK P
0 ACK B
ACK = Achnowledge S = Start P = Stop B = Auto Increment
EXAMPLES No Incremental Bus The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no incremental bus), N-data (all these data concern the subaddress selected), a stop condition.
CHIP ADDRESS SUBADDRESS DATA
MSB S 1 0 0 0 0 0 A
LSB
MSB X X X X
LSB X D1 D0 ACK
MSB DATA
LSB ACK P
0 ACK 0
Incremental Bus The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 1 (incremental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS from "1XXXX1XX" to "1XXX1111" of DATA are ignored. The DATA 1 concerns the subaddress sent, and the DATA 2 concerns the subaddress plus one sent in the loop etc. and at the end, it receives the stop condition.
CHIP ADDRESS SUBADDRESS DATA 1 to DATA n
MSB S 1 0 0 0 0 0 A
LSB
MSB X X X X
LSB X D1 D0 ACK
MSB DATA
LSB ACK P
0 ACK 1
6/11
TDA7467
DATA BYTES (Address = 80(HEX) if ADDR pin is floating, 82(HEX) if ADDR pin is connected to VS): FUNCTION SELECTION: The first byte (subaddress)
MSB D7 B B B B D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 X X X X D1 0 0 1 1 LSB D0 0 1 0 1 MODE SRS/SPACE ATTENUATION SRS/CENTER ATTENUATION INPUT ATTENUATION SUBADDRESS
B = 1: INCREMENTAL BUS; ACTIVE B = 0: NO INCREMENTAL BUS X = INDIFFERENT 0, 1
INPUT ATTENUATION SELECTION
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 INPUT ATTENUATION 0.5 dB STEPS 0 -0.5 -1 -1.5 -2 -2.5 -3 -3.5 4 dB STEPS 0 -4 -8 -12 -16 -20 -24 -28 MUTE
0 0 0 0 0 0 0 0 1
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
INPUT ATTENUATION = 0 -31.5dB
SRS MODE
D7 D6 D5 D4 D3 D2 D1 X X 0 1 RECOMMENDED TO ATTENUATE -3dB ON "SRS OFF" ie. MONO SRS (MONO 3D): XXXXXX01 D0 0 1 1 1 SRS ON MONO SRS (MONO 3D) STEREO SRS (STEREO 3D) MODE SRS OFF (FIX)
7/11
TDA7467
SPACE & CENTER ATTENUATION SELECTION
MSB D7 D6 D5 D4 D3 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 LSB D0 0 1 0 1 0 1 0 1 SPACE & CENTER ATT. 1 dB STEPS 0 -1 -2 -3 -4 -5 -6 -7 8 dB STEPS 0 -8 -16 -24 MUTE
0 0 0 0 1
0 0 1 1 X
0 1 0 1 X
X
X
X
X = INDIFFERENT 0, 1 SPACE & CENTER ATTENUATION = 0dB -31dB
POWER ON RESET
INPUT MODE SPACE ATTENUATION CENTER ATTENUATION MUTE OFF (FIX) MUTE (MIN) MUTR (MIN)
8/11
TDA7467
DIP28 PACKAGE MECHANICAL DATA
mm MIN. a1 b b1 b2 D E e e3 F I L 4.445 3.3 15.2 2.54 33.02 14.1 0.175 0.130 0.23 1.27 37.34 16.68 0.598 0.100 1.300 0.555 TYP. 0.63 0.45 0.31 0.009 0.050 1.470 0.657 MAX. MIN. inch TYP. 0.025 0.018 0.012 MAX.
DIM.
9/11
TDA7467
SO28 PACKAGE MECHANICAL DATA
DIM. MIN. A a1 b b1 C c1 D E e e3 F L S 7.4 0.4 17.7 10 1.27 16.51 7.6 1.27 8 (max.) 0.291 0.016 18.1 10.65 0.1 0.35 0.23 0.5 45 (typ.) 0.697 0.394 0.050 0.65 0.299 0.050 0.713 0.419 mm TYP. MAX. 2.65 0.3 0.49 0.32 0.004 0.014 0.009 0.020 MIN. inch TYP. MAX. 0.104 0.012 0.019 0.013
10/11
TDA7467
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as criticalcomponents in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1997 SGS-THOMSON Microelectronics - Printedin Italy - All RightsReserved The SoundRetrieval System and are registered trademarks of SRS Labs, Inc.
SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - HongKong - Italy- Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore- Spain - Sweden - Switzerland - Taiwan- Thailand - United Kingdom- U.S.A.
11/11

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